Return-Path: Delivered-To: contact@reparatii-laptopuri.ro Received: (qmail 27535 invoked by uid 1008); 5 Nov 2013 12:07:41 +0200 Received: by simscan 1.4.0 ppid: 27529, pid: 27530, t: 1.5220s scanners: regex: 1.4.0 clamav: 0.97.2 /m: spam: 3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.2 (2011-06-06) on zenit X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.5 tests=HTML_MESSAGE, RCVD_IN_DNSWL_NONE,T_DKIM_INVALID autolearn=disabled version=3.3.2 Received: from 105-64.mta.dotmailer.com (94.143.105.64) by mail.reparatii-laptopuri.ro with SMTP; 5 Nov 2013 12:07:40 +0200 DKIM-Signature: v=1; a=rsa-sha1; c=relaxed/relaxed; s=dkim1024; d=my-futureproductnewsletter.com; h=From:To:Subject:MIME-Version:Content-Type:Date:List-Unsubscribe:Reply-To:Message-ID; i=future@my-futureproductnewsletter.com; bh=hjSbhgj3c6LM80ndNDPb3qX1dzk=; b=c8SJeKZcMIFclA+BUM1t/4uapE4IEG8ohKrvlXvjJfjIsFqYGUBJmc27K12JuCIPNUgEizv6mW30 LlBo9KSn/0xdq8B5MjHMszaUHtwqekjPd6VwdfXkGne9hyFivBAcmFN0aHRAatpQgvEJFI198K1t /7x3ZDg3qtYi32Ek2pw= DomainKey-Signature: a=rsa-sha1; c=nofws; q=dns; s=dkim1024; d=my-futureproductnewsletter.com; b=jqhTNyxjRRaA6Fk7HwyqKfAlbXP8pMaMPAhizLFoRA5xCSHRS4bGtcPfcLG+pVVDSrHGgeE+YC/X C76oL3BN1wSDN5VzwGL0JvIa2wIqCVrQ5hwGqizeSNg7pqn0s/VKux7mvTtqFxjbE/gLz8NOS9hT 9gsrDCCe5fzMSsxXNHg=; From: "Future Product News" To: "contact@reparatii-laptopuri.ro" Subject: Route32: Choosing 32-bit simplicity, complexity, speed, flexibility, cost or efficiency MIME-Version: 1.0 Content-Type: multipart/alternative; boundary="BFBHX9KLB5:20131105101448" X-Mailer: dmDroid Date: Tue, 05 Nov 2013 10:14:48 +0000 X-CampaignID: HCRUE X-dmid: 1TFB-1XKMO-BHX9KL List-Unsubscribe: Bounces-to: bo-1TFB-1XKMO-BHX9KL-BZH9R@my-futureproductnewsletter.com Return-Path: bo-1TFB-1XKMO-BHX9KL-BZH9R@my-futureproductnewsletter.com Reply-To: "Future Product News" Message-ID: <1XKMO.BFBHX9KLB5.20131105101448@dotmailer.com> X-AntiVirus: checked (incoming) by Avira MailGuard (Version: 15.0.9.460; AVE:8.3.30.16; VDF:8.11.224.22) --BFBHX9KLB5:20131105101448 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable future@my-futureproductnewsletter.com Facebook ( http://my-futureproductnewsletter.com/1TFB-1XKMO-BHX9KL-SQMNJ-= 0/c.aspx ) Twitter ( http://my-futureproductnewsletter.com/1TFB-1XKMO-BHX9KL-SQMNK-0= /c.aspx ) YouTube ( http://my-futureproductnewsletter.com/1TFB-1XKMO-BHX9KL-SQMNL-0= /c.aspx ) Product Newsletter - Nov 13 In This Issue: Energy-saving ARM=C2=AE-based MCUs. ( http://my-futureproductnewsletter.c= om/1TFB-1XKMO-BHX9KL-T29AX-0/c.aspx ) =20 How to get 32-bit for 32 cents. ( http://my-futureproductnewsletter.com/1= TFB-1XKMO-BHX9KL-T29AY-0/c.aspx ) =20 Ultimate Cortex-M0 flexibility. ( http://my-futureproductnewsletter.com/1= TFB-1XKMO-BHX9KL-T29AZ-0/c.aspx )=20 32-bit with 8-bit simplicity. ( http://my-futureproductnewsletter.com/1TF= B-1XKMO-BHX9KL-T29B0-0/c.aspx ) =20 More memory and highest speed. ( http://my-futureproductnewsletter.com/1T= FB-1XKMO-BHX9KL-T29B1-0/c.aspx ) =20 A balance of speed and power. ( http://my-futureproductnewsletter.com/1TF= B-1XKMO-BHX9KL-T29B2-0/c.aspx ) Power-critical designs get 32-bit processing with Freescale Kinetis L ser= ies MCUs ( http://my-futureproductnewsletter.com/1TFB-1XKMO-BHX9KL-T29AX-= 0/c.aspx ) The exceptional energy efficiency and integration of Freescale=E2=80=99s = Kinetis L microcontrollers mean that 8- and 16-bit designs can be replace= d with the 32-bit processing power of the ARM=C2=AE CortexTM-M0+ core. In addition to the energy-efficient core, Kinetis L series MCUs offer ult= ra low-power operation and multiple power-saving modes, as well as smart = peripherals which can function in deep sleep. Data, Sample & Dev Board Request... ( http://my-futureproductnewsletter.c= om/1TFB-1XKMO-BHX9KL-T29AX-0/c.aspx ) Breaking the 32-bit price barrier without cutting core speed or periphera= ls ( http://my-futureproductnewsletter.com/1TFB-1XKMO-BHX9KL-T29AY-0/c.as= px ) With STM32F030 Value-Line microcontrollers, from STMicroelectronics, the = cost of 32-bit processing is as low as 32 cents for high-volume designs w= ithout the usual trade-offs on core speed or peripheral integration. The rich integration includes a 48MHz ARM=C2=AE Cortex=E2=84=A2-M0 core t= ogether with mixed-signal and communication peripherals; a calendar RTC, = direct memory access, temperature sensor and timers. All for 32 cents for= high-volume designs. Data, Sample & Dev Board Request... ( http://my-futureproductnewsletter.c= om/1TFB-1XKMO-BHX9KL-T29AY-0/c.aspx ) The most reconfigurable ARM=C2=AE CortexTM-M0 for custom mixed-signal sys= tem-on-chip designs ( http://my-futureproductnewsletter.com/1TFB-1XKMO-BH= X9KL-T29AZ-0/c.aspx ) The integration of an ARM=C2=AE CortexTM-M0 core and the unique flexibili= ty of PSoC=C2=AE4=E2=80=99s programmable analogue and digital blocks and = automatic routing offers the ultimate flexibility for -M0 core designs. Replace 8- and 16-bit designs with a flexible 32-bit platform which offer= s a range of pre-characterised, production-ready PSoC components for easy= reconfiguration and future-proof scalability for custom mixed-signal sys= tem-on-chip designs. Data, Sample & Dev Board Request... ( http://my-futureproductnewsletter.c= om/1TFB-1XKMO-BHX9KL-T29AZ-0/c.aspx ) Flexibility without complexity with easy-to-use peripherals on NXP=E2=80=99= s LPC81xM MCUs (http://my-futureproductnewsletter.com/1TFB-1XKMO-BHX9KL-S= Z9SJ-0/c.aspx As a replacement for 8- or 16-bit designs, the 32-bit LPC81xM offers adva= nced peripherals which offer 32-bit capabilities with 8-bit simplicity an= d the power efficiency of the ARM=C2=AE CortexTM-M0+ core. The LPC81xM introduces a new level of flexibility, without adding complex= ity, when migrating low-cost designs to 32-bit processing using features = such as a flexible switch matrix for one-click I/O configuration. Data, Sample & Dev Board Request... ( http://my-futureproductnewsletter.c= om/1TFB-1XKMO-BHX9KL-T29B0-0/c.aspx ) Up to 512/128kB Flash/Ram and 80MHz for audio, graphics, touch & connecti= vity ( http://my-futureproductnewsletter.com/1TFB-1XKMO-BHX9KL-T29B1-0/c.= aspx ) High-quality, low-cost audio, graphic displays, capacitive touch and USB = connectivity are all enabled by the high memory and integration of Microc= hip=E2=80=99s PIC32MX3/4 microcontrollers, with the 80MHz 32-bit MIPS32=C2= =AEM4K=C2=AE core. Based on the proven MIPS=C2=AE Release 2 architecture, the M4KTM core ach= ieves 1.56 DMIPS/MHz and excellent CoreMark performance as well as up to = a 40% reduction in code size with the MIPS16e=C2=AE Application Specific = Extension (ASE). Data, Sample & Dev Board Request... ( http://my-futureproductnewsletter.c= om/1TFB-1XKMO-BHX9KL-T29B1-0/c.aspx ) More MHz per mW and true 1.6V operation with 32-bit AVR=C2=AE UC3 MCUs fr= om Atmel ( http://my-futureproductnewsletter.com/1TFB-1XKMO-BHX9KL-T29B2-= 0/c.aspx ) Atmel=E2=80=99s AVR=C2=AE UC3 MCUs are optimised to balance system perfor= mance and power consumption across a range of applications from entry-lev= el or portable, to high data throughput or sensor fusion. Battery-powered designs will use the intelligent peripherals and dynamic = power control, whilst high-end applications will need the peripheral DMA = controller and multi-layer high-speed bus architecture. Data & Sample Request... ( http://my-futureproductnewsletter.com/1TFB-1XK= MO-BHX9KL-T29B2-0/c.aspx ) Future Electronics - EMEA Headquarters - London, Future House, The Glanty= , Egham, Surrey, TW20 9AH, UK If you're having problems viewing this message, please click here http://= my-futureproductnewsletter.com/1TFB-1XKMO-BFBHX9KLB5/cr.aspx Unsubscribe http://my-futureproductnewsletter.com/1TFB-1XKMO-BFBHX9KLB5/u= ns.aspx | Forward to a friend http://my-futureproductnewsletter.com/1TFB-= 1XKMO-BFBHX9KLB5-0/fw.aspx --BFBHX9KLB5:20131105101448 Content-Type: text/html; charset="utf-8" Content-Transfer-Encoding: quoted-printable Route32: Choosing 32-bit simplicity, complexity, speed, flexibilit= y, cost or efficiency =0A=0A=0A=0A=0A
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3D"Future_Email"=0A = <= span style=3D"color: rgb(255, 255, 255);">future@my-futureproductnewslett= er.com=0A 3D"Future_Facebook"=0A= 3D"Future_Twitter"=0A 3D"Future_YouTube"=0A
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Product Newslette= r - Nov 13=0A
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In This Issue:
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=0A =0A = =0A =0A =0A= =0A =0A =0A =0A <= td width=3D"300" style=3D"margin: 0px; padding-top: 0px;padding-right: 15= px;padding-bottom: 15px;padding-left: 15px; border-top: 0px currentColor;= border-right: 0px currentColor;border-bottom: 0px currentColor;border-lef= t: 0px currentColor; text-align: left; color: rgb(0, 0, 0); font-family: = Arial, sans-serif; font-size: 12px; vertical-align: text-top; background-= color: rgb(255, 255, 255);">
Power-critical designs get 32-bit processing with Freescale Kineti= s L series MCUs=0A

The exceptional energy efficiency and integration of Freesc= ale=E2=80=99s Kinetis L microcontrollers mean that 8- and 16-bit designs = can be replaced with the 32-bit processing power of the ARM=C2=AE Cortex=E2=84=A2-M0+ core.

In addition to the energy-efficient= core, Kinetis L series MCUs offer ultra low-power operation and multiple= power-saving modes, as well as smart peripherals which can function in d= eep sleep.

D= ata, Sample & Dev Board Request...
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Breaking the 32-bit= price barrier without cutting core speed or peripherals=0A =

With STM32F030 Val= ue-Line microcontrollers, from STMicroelectronics, the cost of 32-bit pro= cessing is as low as 32 cents for high-volume designs without the usual t= rade-offs on core speed or peripheral integration.

The rich integ= ration includes a 48MHz ARM=C2=AE Cortex=E2=84=A2-M0 core toge= ther with mixed-signal and communication peripherals; a calendar RTC, dir= ect memory access, temperature sensor and timers. All for 32 cents for hi= gh-volume designs.

Data, Sample & Dev Board Request...
=0A
=0A =0A =0A =0A = =0A =0A <= td width=3D"300" align=3D"left" class=3D"ee_dropzone" style=3D"margin: 0p= x; padding-top: 0px;padding-right: 0px;padding-bottom: 0px;padding-left: = 0px; border-top: 0px currentColor;border-right: 0px currentColor;border-b= ottom: 0px currentColor;border-left: 0px currentColor; text-align: center= ; color: rgb(0, 0, 0); font-family: Arial, sans-serif; font-size: 12px; v= ertical-align: text-top; background-color: rgb(255, 255, 255);">=0A =
=0A = =0A =0A =0A= =0A =0A =0A =0A <= td width=3D"300" style=3D"margin: 0px; padding-top: 0px;padding-right: 15= px;padding-bottom: 15px;padding-left: 15px; border-top: 0px currentColor;= border-right: 0px currentColor;border-bottom: 0px currentColor;border-lef= t: 0px currentColor; text-align: left; color: rgb(0, 0, 0); font-family: = Arial, sans-serif; font-size: 12px; vertical-align: text-top; background-= color: rgb(255, 255, 255);">
The most reconfigurable ARM=C2=AE Cortex=E2=84=A2-M0 f= or custom mixed-signal system-on-chip designs=0A =

The integration of an ARM=C2=AE Cortex=E2=84=A2-M0 core and the unique flexibility of PSoC<= sup>=C2=AE4=E2=80=99s programmable analogue and digital blocks and = automatic routing offers the ultimate flexibility for -M0 core designs.
Replace 8- and 16-bit designs with a flexible 32-bit platform which= offers a range of pre-characterised, production-ready PSoC components fo= r easy reconfiguration and future-proof scalability for custom mixed-sign= al system-on-chip designs.

Data, Sample &am= p; Dev Board Request...
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Flexibility without complexity with easy-to-use peripherals on NXP=E2=80= =99s LPC81xM MCUs=0A

As a replacement for 8- or 16-bit designs, the 32-bit LPC= 81xM offers advanced peripherals which offer 32-bit capabilities with 8-b= it simplicity and the power efficiency of the ARM=C2=AE Cortex= =E2=84=A2-M0+ core.

The LPC81xM introduces a new level of flexibil= ity, without adding complexity, when migrating low-cost designs to 32-bit= processing using features such as a flexible switch matrix for one-click= I/O configuration.

Data, Sample & Dev = Board Request...
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Up to= 512/128kB Flash/RAM and 80MHz for audio, graphics, touch & connectiv= ity=0A
High-quality, low-cost audio, graphic displays, capacitive touch and US= B connectivity are all enabled by the high memory and integration of Micr= ochip=E2=80=99s PIC32MX3/4 microcontrollers, with the 80MHz 32-bit MIPS32= =C2=AEM4K=C2=AE core.

Based on the proven M= IPS=C2=AE Release 2 architecture, the M4K=C2=AE cor= e achieves 1.56 DMIPS/MHz and excellent CoreMark performance as well as u= p to a 40% reduction in code size with the MIPS16e=E2=84=A2 Application S= pecific Extension (ASE).=0A

Data, Sample &a= mp; Dev Board Request...
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More MHz per mW and true 1.6V operation with 32-bit AVR=C2=AE UC3 MCUs from Atmel=0A =

Atmel=E2=80=99s AVR=C2=AE UC3 MCUs are o= ptimised to balance system performance and power consumption across a ran= ge of applications from entry-level or portable, to high data throughput = or sensor fusion.

Battery-powered designs will use the intelligent= peripherals and dynamic power control, whilst high-end applications will= need the peripheral DMA controller and multi-layer high-speed bus archit= ecture.

Data & Sample Request...
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Future Electronics - EMEA Headquarters - London, Future House= , The Glanty, Egham, Surrey, TW20 9AH, UK=0A
=0A =0A =0A

If you're having problems viewing this message, please= click here=0A
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